新着情報

Prof. Mehdi Saligane

Brown University(米ブラウン大学)の Mehdi Saligane先生にご講演頂きました。 Speaker: Prof. Mehdi Saligane (Brown University, USA) Title: AI for Chips & Chips for AI Abstract: The exploding scale of modern applications is stretching yesterday’s integrated-circuit (IC) design flows beyond their limits. This talk presents a unified, open, and highly-automated paradigm—AI for Chips & Chips for AI—that simultaneously (i) harnesses artificial intelligence in EDA to build better silicon and (ii) architects silicon that runs AI better. AI for Chips - Traditional analog layout still relies on expert heuristics. We introduce Agentic-RL gLayout, a goal-conditioned reinforcement-learning agent that replaces hand-tuned placement and routing with policy-driven planning, action, and self-correction. The agent ingests high-level objectives, observes the evolving layout state, and chooses between primitive commands and high-level macros. Positive rewards track goal attainment; penalties capture DRC violations, area bloat, and parasitics, producing cleaner, compact, and rule-compliant layouts without manual intervention. Built atop open-source engines such as OpenROAD, Open Se Cura, and OpenFASoC, the framework pushes layout quality while democratizing access to sophisticated analog design automation. Chips for AI - Conversely, deploying large language model (LLM) workloads at the edge demands silicon tuned for extreme efficiency. We unveil a hardware–software co-design stack centered on ConSmax, a highly parallel, element-wise alternative to Softmax that slashes latency and energy. By co-optimizing network topology, arithmetic precision, and accelerator micro-architecture, the framework meets sub-millisecond deadlines, preserves privacy, and cuts cloud dependence. Finally, this talk will walk through an open chip design infrastructure augmented with LLM-guided code, circuit, and layout generation that turns hardware creation into a rapid feedback loop, where AI sharpens the EDA tools, while tailored accelerators speed up AI. Closing the “AI-for-chips, chips-for-AI” cycle should make taping-out test chips possible in weeks instead of years, thus propelling the next wave of semiconductor innovation. Bio: Mehdi Saligane received the B.S. and M.S. degrees in Electrical Engineering Systems and Industrial Computing from École Polytechnique de Grenoble in 2009, and the M.S. Degree in electrical engineering from the University of Grenoble in 2011, and the Ph.D. degree in Electrical Engineering and Computer Science from the University of Aix-Marseille (IM2NP), France, in 2016. From 2010 to 2015, he was part of the Central Research and Development Group at STMicroelectronics in Crolles, France, focusing on adaptive, ultra-low-power digital design. In 2015, he joined the Michigan Integrated Circuit Laboratory at the University of Michigan, Ann Arbor, MI, USA,
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ISSCC 2026で4件発表

ISSCC 2026で発表します! Forum Presentation Kenichi Okada, “Exploration of 6G FR3 for Coverage, Capacity, and Sensing in Edge AI Era” Regular Session Daxu Zhang, et al., “A 9.7GHz Self-Linearized-VCO-Based FMCW Chirp Generator Achieving 1.56GHz/µs Slope and 0.57µs Duration with 0.094% rms Frequency Error” Dongfan Xuさん、Minghao Fanさんが、Student Research Previewで発表します。
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Prof. Jeffrey S. Walling

Virginia Tech(バージニア工科大学)の Jeffrey S. Walling教授にご講演頂きました。 Speaker: Prof. Jeffrey S. Walling (Virginia Tech, USA) Title: Bits-to-Waves: Digital RF, mm-Wave and THz Systems to Enable the Next-G Abstract: Mixer-based transmitters have been dominant for approximately 100 years. However, for more than a decade RF-DACs have demonstrated the ability to combine the functionality of the DAC, upconverter and amplification stages of a transmitter into a single block. The switched-capacitor power amplifier (SCPA) is a versatile RF-DAC that operates in a voltage mode and uses transistors only as switches. This talk provides a tutorial introduction of the SCPA and presents architectural examples that enable both frequency reconfigurability and operation up to mm-Wave, supporting up to 3Gb/s transmission rates. New uses of algorithmic designs for RF passives will also be introduced. Speaker Bio: Jeff Walling received his BS from University of South Florida and his MS and PhD from University of Washington, all in Electrical Engineering. He has held industrial positions at Motorola, Intel, Qualcomm and Skyworks. His research has primarily focused on circuits for wireless communications and sensing. From 2012 to 2019, he was an assistant, then associate professor at University of Utah. Then he was head of RF transceivers at Tyndall National Institute in Cork, Ireland. Since 2021, he is an associate professor at Virginia Tech. He has served as an associate editor for TCAS-II, TCAS-I and JSSC, and on the technical program committees of the IEEE RFIC, ISSCC and NEWCAS conferences. He is a senior member of the IEEE and has more than 80 papers in peer reviewed conferences and journals.
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A-SSCC 2025

韓国のDaejeonで開催されたIEEE Asian Solid-State Circuits Conference (A-SSCC)で発表しました. Dongfan Xu, Minzhe Tang, Haiyun Gu, Ziyuan Ren, Yilun Chen, Minghao Fan, Yuxuan Liu, Daxu Zhang, Yi Zhang, Zheng Li, Yuncheng Zhang, and Kenichi Okada, “A Ka-Band Time-Modulated Variable Gain Amplifier with 30-dB Gain Tuning and <2° Phase Variation via Duty Cycle Control” Sunghwan Park, Yudai Yamazaki, Carrel de Gomez, Chenxin Liu, Jun Sakamaki, Hiroyuki Sakai, Kazuaki Kunihiro, and Kenichi Okada, “A High-Efficient 154GHz 4TX/4RX FMCW Radar Chipset in 65nm CMOS” Kenichi Okada“How to cultivate good chip designers” Panel discussion “Millimeter-Wave Circuit Innovations for 6G and Beyond” KAIST EE Global Symposium IEEE/IEIE ICCE Asia“Millimeter-Wave Circuit Innovations for 6G and Beyond” also presented at Seoul National Univerisity
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Prof. Mark Rodwell

UCSBのMark Rodwell教授にご講演頂きました! Lecturer: Prof. Mark Rodwell(University of California, Santa Barbara) Title: 100-300 GHz Wireless: transistors, ICs, systems Date & Time: Tuesday, July 15, 2025, 15:45 – 17:30 Abstract: We describe the opportunities, and the research challenges, presented in the development of 100-300GHz wireless communications and imaging systems. In such links, short wavelengths permit massive spatial multiplexing both for network nodes and point-point links, permitting aggregate transmission capacities approaching 1Tb/s. 100-300GHz radar imaging systems can provide thousands of image pixels and sub-degree angular resolution from small apertures, supporting foul-weather driving and aviation. Challenges include the mm-wave IC designs, the physical design of the front-end modules, the complexity of the back-end digital beamformer required for spatial multiplexing, and, for imaging, the development of system architectures requiring far fewer RF channels than the number of image pixels. We will describe transistor development, IC design, and system design, and describe our efforts to develop 140GHz massive MIMO wireless hubs, and 210GHz and 280GHz MIMO backhaul links.
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山崎雄大さん、第38回独創性を拓く先端技術大賞「文部科学大臣賞」を受賞

優れた研究成果を上げた理工系の学生や企業の若手研究者らを表彰する「第38回 独創性を拓く 先端技術大賞」(主催・産経新聞社、後援・文部科学省、経済産業省、ニッポン放送、特別協力・アカリク)の授賞式が7月14日、高円宮妃久子さまをお迎えして東京・元赤坂の明治記念館で開かれ、博士課程の山崎雄大さんが学生部門の最高賞である「文部科学大臣賞」を受賞しました。
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OB/OG会

2025/8/23(土)にOB/OG会を開催します! MLで連絡していますが、受け取れていない方は連絡ください!
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ISSCC 2025

Eveninig Panel: “Future of Analog Design: Still Magical or Mostly Digital?” Forum: Wireless Communication Technology for Space Applications: From Satellite to Dish and Smartphones Kenichi Okada, Institute of Science Tokyo, Tokyo, Japan “Foldable Phased-Array Transceivers for Satellite Communications”
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