Site Visit for the JST Next-Generation Edge AI Semiconductor R&D Program "Research and Development of Analog-Digital Mixed-Signal Edge AI SoC Design Technology"

On Tuesday, July 7, 2026, a site visit for the JST Next-Generation Edge AI Semiconductor Research and Development Program — research theme “Research and Development of Analog-Digital Mixed-Signal Edge AI SoC Design Technology” (Grant Number: JPMJES2515) — was held at the Ookayama Campus of Institute of Science Tokyo.

We welcomed representatives of the Japan Science and Technology Agency (JST) and the program advisors, and introduced the activities and progress of this research and development theme, along with a tour of our research facilities and an exchange of views on the research and development. The visit gave rise to active discussions, and we received valuable advice.

We would like to express our sincere gratitude, and we will continue to move the project forward.