JSSCで2件発表します！

JSSC2019

Haosheng Zhang, Herdian Hans, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shigeyoshi Goka, Shinya Yanagimachi, and Kenichi Okada,“ULPAC: A Miniaturized Ultralow-Power Atomic Clock,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 11, pp. 3135-3148, Nov. 2019.https://doi.org/10.1109/JSSC.2019.2941004Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, and Kenichi Okada,“A 265-uW Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 12, Dec. 2019.https://doi.org/10.1109/JSSC.2019.2936967Congratulations!